Researcher - Electrical Engineer - Former Software Developer
Semiconductor engineering at the edge of physics.
Hello, I’m Phanish Chava, an electrical engineer passionate about bridging academic research and industrial innovation to advance micro- and nanoelectronic semiconductor technologies.
CRYOGENIC CMOS✦COMPACT MODELING✦LOW-FREQUENCY NOISE✦FD-SOI✦2D MATERIALS✦DEVICE CHARACTERIZATION✦CRYOGENIC CMOS✦COMPACT MODELING✦LOW-FREQUENCY NOISE✦FD-SOI✦2D MATERIALS✦DEVICE CHARACTERIZATION
01 About
From atomically thin devices to scalable cryogenic electronics.
My work sits at the intersection of semiconductor device physics, measurement and modeling. I have built and characterized 2D-material devices, developed compact models for advanced transistors, and helped translate cryogenic device behavior into design-ready model libraries.
In 2026, I joined AdMOS GmbH Advanced Modeling Solutions as CTO, leading work on transistor models and low-frequency-noise measurement systems. Previously, I conducted postdoctoral research at Forschungszentrum Jülich focused on cryogenic characterization, FDSOI modeling and post-silicon verification for quantum-control electronics.
02 Expertise
What I work on
Cryogenic Electronics
Electrical characterization and model validation of advanced CMOS nodes down to deep-cryogenic temperatures for quantum-control electronics.
Device Modeling
Compact-model development, extraction, validation and EDA-compatible design libraries that translate measured device physics into circuit simulation.
Semiconductor Characterization
I-V, C-V and noise characterization, cryogenic Hall measurements, AFM, photoluminescence and Raman spectroscopy.
Nanoelectronics & 2D Materials
Fabrication and study of van der Waals heterojunctions, tunneling transistors, photodiodes, temperature sensors and black-phosphorus gas sensors.
03 Journey
Experience & education
2026 — now
Industry · Leadership
CTO · AdMOS GmbH Advanced Modeling Solutions
Leading the development of transistor models and low-frequency-noise measurement systems, bridging semiconductor measurement, model extraction and EDA workflows.
2023 — 2026
Postdoctoral research
Forschungszentrum Jülich · PGI-4
Cryogenic characterization and compact modeling of advanced CMOS nodes, cryogenic PDK development for FDSOI transistors, and post-silicon verification of mixed-signal ASICs.
2018 — 2025
Doctoral research
TU Dresden · Helmholtz-Zentrum Dresden-Rossendorf
Electrical transport in two-dimensional van der Waals heterojunctions, including tunneling transistors, photodiodes, temperature sensors and gas sensing.
2017
Research internship
imec · Leuven
Fabrication and characterization of 2D-material transistors and development of virtual-source compact models.
2014 — 2015
Software engineering
Accenture Services · India
Built mobile and web banking applications and proposed automated testing algorithms for robust application performance.
Electrical Engineering
Technische Universität Dresden
Dissertation: electrical transport in 2D van der Waals heterojunctionsNanoelectronic Systems
Technische Universität Dresden
2015–2018Electronics & Instrumentation
Vellore Institute of Technology
2010–201404 Recognition
Awards
HZDR Innovation Contest · 3rd Place
2D-material gas sensor development
DAAD-STIBET Scholarship
For highly committed international students
CFAED-INSPIRE Grant
Research stay at imec, Leuven
05 Research